For the 3-level multilevel inverter with low distortion, we use phase-arrangement PWM technique. To simulate the 3-level multi-level inverter scheme, we use two capacitors on the DC bus. The RLC branch is in series. In the RLC branch we eliminate the resistance, inductance or capacitance of the branch, the R, L, C values ​​are automatically set to 0.0 and infinity respectively. In the RLC branch, R is 1 ohm, L is 1-3 H, and C is 1-6 F. The DC voltage source block implements the ideal DC voltage source. In the 3 level inverter simulation diagram we use 4 diodes. A diode is the semiconductor device controlled by its own voltage and current. When the diode is forward biased, the voltage of the diode is greater than zero and it begins to conduct with a small forward voltage across it. It turns off when the current flow in the device becomes zero. When the diode is reverse biased, the diode voltage is less than zero and remains off. In the 3-level multi-level inverter simulation, we use eight MOSFETs as switching device for better output and low distortion. Metal oxide semiconductor field effect transistor is a gate signal controllable semiconductor device (g>0), the MOSFET is connected in parallel with an internal diode which turns on when the MOSFET device is reversed